Spatial

Specify Parameterized Accelerators Through Inordinately Abstract Language #Easily Write and Validate Algorithms Write high-performance code without being encumbered by the low-level details about hardware (unless you want to). Validate code with a short feedback loop that allows for rapid and efficient #Automatically Explore Design Space Let the compiler use neural networks to rapidly explore huge design spaces, including coarse-grain pipelining and parallelization factors and choose the optimal designs #Seamlessly Deploy to Hardware Generate bitstreams and co-processor code for a variety of systems, including Amazon AWS F1 instances, Xilinx Ultrascale MPSoC, Altera Arria10 SoC, Coarse-grain reconfigurable architectures, ASIC-ready HDL, and more...